The Mentor Veloce emulation platform is the highest-capacity emulation platform on the market, and enables the complete functional verification of complex system-on-chip (SoC) designs. The Veloce emulation platform's architecture allows globally distributed engineering teams to simultaneously run verifications remotely on the same emulation platform.
Univa Grid Engine is particularly adept at managing workloads that need to make use of extremely valuable resources, subject to policies that embody an organization's priorities - for example, by proactively ensuring that multiple projects are entitled to receive access to the Veloce emulation platform according to a predetermined allocation scheme and priorities.
Thus, collaboration between Mentor and Univa accelerates workload throughput during the development cycle and provides pre-silicon testing and debug at hardware speeds using real-world data. With Univa Grid Engine for Veloce, Univa offers a complete solution to maximize the efficiency and use of the Veloce emulation platform, which results in reduced hardware costs and verification time.
The Veloce emulation platform enables complete functional verification of complex system-on-chip (SoC) designs - including the advantages over purely software-based emulation and prototyping
Univa Grid Engine introduces enterprise workload management capabilities such as job queuing, workload prioritization (through automated policies that include fair-sharing based on entitlements granted to engineers, projects, or departments), as well as support for interactive jobs (including those that require a GUI)
The Mentor - Univa collaboration has resulted in a tightly coupled integration between the Veloce emulation platform and Univa Grid Engine workload manager - including an architectural overview that details the externals (e.g., customized command line and graphical user interfaces) and internals (e.g., interoperability agents that ensure cooperative, two-phase scheduling)
The resulting Univa Grid Engine for Veloce supports a variety of workload-management use case examples involving emulators - illustrations will include live product demonstrations from Mentor and Univa
Vijay Chobisa, Product Marketing Manager, Mentor Graphics.
Vijay Chobisa has over 12 years of experience in transaction-based acceleration and in-circuit emulation. He is currently the Product Marketing Manager for the Mentor Graphics Emulation Division. He has worked as a technical marketing engineer and technical marketing manager at IKOS systems and as an ASIC design engineer at Logic++. Vijay holds a bachelor's degree of electronics and communication engineering from Jai Narayan Vyas University, Rajasthan, India.
Ian Lumb, System Architect, Univa Corporation.
As an HPC specialist, Ian Lumb has spent about two decades at the global intersection of IT and science. Ian received his B.Sc. from Montreal's McGill University, and then an M.Sc. from York University in Toronto. Although his undergraduate and graduate studies emphasized geophysics, Ian's current interests include workload orchestration and container optimization for HPC to Big Data Analytics in clusters and clouds.
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